module FetchDataDecoder(reset, data, icode, ifun, rA, rB, valC);
input reset;
input [47:0] data;
output [3:0] icode;
output [3:0] ifun;
output [3:0] rA;
output [3:0] rB;
output [31:0] valC;

assign icode = reset ? data[47:44] : 4'b0;
assign ifun = reset ? data[43:40] : 4'b0;
assign rA = reset ? data[39:36] : 4'b0;
assign rB = reset ? data[35:32] : 4'b0;

assign valC = reset ? ((icode == 7 || icode == 8)?
							  {data[15:8],data[23:16],data[31:24],data[39:32]}:
							  {data[7:0],data[15:8],data[23:16],data[31:24]}) 
				  : 32'b0;
endmodule